ARM Processor Architecture Multiple Choice Questions and Answers for Practice

16. When a transfer is required the APB bus moves into the

1. hold state
2. setup state
3. Rising state
4. None

17. When semi-hosting is executed, the debug agent

1. Suspends program execution
2. Continues program execution
3. Both a and b
4. None of the above

18. When the number of stages in a pipeline increases from 3 to 5, then the

1. Throughput reduces
2. Latency reduces
3. Throughput and latency increases
4. Throughput increases and latency reduces

19. When the processor is executing simple data processing instructions, the pipeline enables one instruction to be completed every clock cycle, this is also called as

1. Throughput
2. Latency
3. Execution
4. None of the above

20. Which among the following data processing instructions does not use the barrel shifter?

1. ADD R2, R5, R4
2. MOV R5, R4, LSL #2
3. MOV r5, R4, LSR #2
4. MOV r5, R4, ROR #2

21. Which of the following instruction ignores Operand1

1. MOV
2. MUL
3. ADD
4. SUB

22. Which of the following is not one of the source files of a linker to form an executable?

1. .obj
2. .lef
3. .so
4. .lib

23. Which of the following is the reason that the Least Recently Used (LRU) algorithm is usually not used as a page replacement algorithm?

1. Other practical schemes such as MIN do a better job
2. LRU requires knowledge of the future to work correctly
3. LRU is too inefficient to implement in practice
4. The Clock algorithm always outperforms LRU

24. Which of the following may not be on the APB bus

1. USART
2. RAM
3. Keypad
4. Timer module

25. Which of the following processors belong to Reduced Instruction Set Computers (RISC family)?

1. ARM
2. AVR
3. MIPS
4. All of the above

26. Which of the following statements are true with respect to pipelining.
I. Pipelining is an implementation technique whereby multiple instructions are overlapped in execution. It is not visible to the programmer
II. Each step is called a pipe stage or pipe segment
III. Pipeline machine cycle is the time required to move an instruction one step down the pipeline

1. All are true
2. I and III are true
3. II and III are true
4. None of them are true

27. Which of the following statements are true
I. In Little endian mode it is easier to determine a sign of the number
II. Little endian mode is easier for addition and multiplication of multi-precision numbers
III. Big endian mode is easier to divide two numbers
IV. Big endian mode is easier to compare two numbers

1. I & II are true
2. III & IV are true
3. I & III are true and II and IV are false
4. I & II are false and III and IV are true

28. Write Through technique is used in one of the following to write the data back.

1. Virtual memory
2. Main memory
3. Auxiliary memory
4. Cache memory

29. Fixed instruction length is a feature of one of the following architecture.

1. CISC
2. RISC
3. X86
4. None of the above

30. Which of the following register in ARM7 is used to point to the location of currently executing instruction in a program?

1. R1
2. R5
3. R15
4. R8