ARM Processor Architecture Objective Questions | MCQ Quiz for Practice

61. If the Most Significant Byte (MS) is stored first while ordering byte values for storing data in memory, it is called as

1. Big-endian
2. Little-endian
3. Big- and Little-endian
4. None of them

62. If Vector Floating Point (VPF) has to handle 8-single precision numbers, VPF architecture must have..........processing elements that work in parallel.

1. 8
2. 16
3. 24
4. 1

63. In a 32- bit IEEE 754 notation, biased value of exponent value ranges from

1. -126 to 127
2. 0 to 127
3. -126 to 0
4. None of the above

64. In an Operating System, each process has its own

1. address space and global variables
2. open files
3. pending alarms, signals and signal handlers
4. all of the above

65. In the ARM Nomenclature ARMxTDMI, D and M stand for

1. Debug and Fast Multiplier units are present
2. Division and Multiplier units are present
3. Debugger and Multiplier units are not present
4. Division and Multiplier units are not present

66. In the memory hierarchy, as the speed of memory access increases the memory size

1. Increases
2. Decreases
3. Both
4. None of the above

67. Instruction used to multiply R5 contents by R4 and to store the result into R6 is called

1. MUL R6, R5, LSL #2
2. MUL R6, R5, R4
3. MUL R6, R5, LSR #2
4. None of the above

68. Instruction used to Test equality of two 32-bit values in ARM7 is called

1. TEQ
2. TST
3. EOR
4. None of the above

69. Main advantage of the PWM is that

1. Power loss in the switching devices is very high
2. Power loss in the switching devices is very low
3. No power loss in switching devices
4. None of the above

70. Memory management technique in which the OS stores and retrieves data from secondary storage for use in main memory is called

1. Fragmentation
2. Paging
3. Mapping
4. None of the above

71. Memory unit accessed by its content is called

1. Read only memory
2. Programmable Memory
3. Virtual Memory
4. Associative Memory

72. Minimum possible denormalized number representation is possible with single precision IEEE 754 format is

1. 2^-126
2. 2^-127
3. 2^-149
4. 2^-128

73. MRC, MCR are the

1. Co-processor register transfer instructions
2. Thumb instructions
3. Both a and b
4. Shift instructions

74. Operating System maintains the page table for

1. Each data element
2. Each instruction
3. Each address
4. Each process

75. R1 = 0b1111 , R2 = 0b0101 , BIC R0, R1, R2

1. R0 = 0b1010
2. R0 = 0b1111
3. R0 = 0b0101
4. R0 = 0b1100