VLSI Design MCQ Questions and Answers for Practice

1. What advantage does the 74LSXX series device have over standard TTL?

1. higher propagation delay
2. reduced propagation delay
3. low power consumption
4. low power consumption and reduced propagation delay

2. What advantage does the 74LXX series device have over standard TTL?

1. lower voltage requirements
2. reduced propagation delay
3. higher propagation delay
4. low power consumption

3. What advantage does the 74SXX series device have over standard TTL?

1. higher propagation delay
2. lower voltage requirements
3. low power consumption
4. reduced propagation delay

4. When a CMOS gate output connects to a TTL gate, which circuit is needed?

1. a decoupling capacitor
2. a pull-up resistor
3. a pull-down resistor
4. a CMOS buffer

5. When a TTL gate output connects to a CMOS gate, what must be added to the circuit?

1. a decoupling capacitor
2. a pull-up resistor
3. a pull-down resistor
4. an open-collector gate

6. When interfacing CMOS to TTL what potential problem must be overcome?

1. There may be insufficient current.
2. The low output voltage may be insufficient.
3. The output current may be too great.
4. The high voltage may be too low.

7. When the outputs of several open-collector TTL gates are connected together, the gate outputs

1. produce more fan-out.
2. usually burn out.
3. are ANDed together.
4. produce more voltage.

8. When the outputs of several standard TTL gates are connected together, the gate outputs

1. enable new logic configurations.
2. produce more fan-out.
3. usually burn out.
4. produce more voltage.

9. Which alteration is made in the manufacture of a TTL gate to create an open-collector output?

1. The output transistors are replaced by diodes.
2. The input transistor is replaced by a diode.
3. The output transistors are missing.
4. The top output transistor is missing.

10. Which of the following are not characteristics of TTL logic gates?

1. Totem-pole output
2. Bipolar transistors
3. CMOS transistors
4. Multiemitter transistors

11. Which of the following input levels would not be a valid HIGH for a TTL gate?

1. 2.4 V
2. 2.1 V
3. 1.8 V
4. All are valid.

12. Which of the following is a concern when using CMOS type devices?

1. mechanical shock
2. electrostatic discharge
3. fan out
4. under voltage

13. Which of the following is a special type of transistor used in the TTL series to improve speed characteristics?

1. Belrus
2. Shockley
3. Brattain
4. Schottky

14. When setting the voltage for an external device that must interface with an FPGA, you must change the value of

1. VCCIO
2. VDDIN
3. VDDiO
4. VCCIN

15. Which of the following digital IC logic families is most susceptible to static discharge?

1. RTL
2. ECL
3. MOS
4. TTL